1 file number 2890.5 ha-2505 12mhz, high input impedance, operational ampli?r ha-2505 is an operational ampli?r whose design is optimized to deliver excellent slew rate, bandwidth, and settling time speci?ations. the outstanding dynamic features of this internally compensated device are complemented with low offset voltage and offset current. this dielectrically isolated ampli?r is ideally suited for applications such as data acquisition, rf, video, and pulse conditioning circuits. slew rates of 30v/ s and 330ns (0.1%) settling time make this device an excellent component in fast, accurate data acquisition and pulse ampli?ation designs. 12mhz small signal bandwidth and 500khz power bandwidth make this device well suited to rf and video applications. with 2mv typical offset voltage plus offset trim capability and 10na offset current, ha-2505 is particularly useful in signal conditioning designs. the gain and offset voltage ?ures of the ha-2505 are optimized by internal component value changes while the similar design of the ha-2515 is maximized for slew rate. mil-std-883 product and data sheets are available upon request. features slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30v/ s fast settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330ns full power bandwidth . . . . . . . . . . . . . . . . . . . . . . 500khz gain bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mhz high input impedance . . . . . . . . . . . . . . . . . . . . . . 50m ? low offset current . . . . . . . . . . . . . . . . . . . . . . . . . . 10na internally compensated for unity gain stability applications data acquisition systems rf ampli?rs video ampli?rs signal generators pinout ha-2505 (pdip) top view ordering information part number temp range ( o c) package pkg. no. HA3-2505-5 0 to 75 8 ld pdip e8.3 1 2 3 4 8 7 6 5 comp v+ out bal bal -in +in v- + - data sheet may 1999 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | copyright intersil corporation 1999
2 schematic q 37 q 28 r 26 q 32 q 35 q 4 q 2 q 34 q 33 q 24 q 23 q 22 q 19 q 13 q 25 q 20 v- - input r 2 2k q 27 q 18 q 21 r 15 740 r 16 1.48k r 17 1.48k r 18 1.48k q 3 comp q 6 q 8 q 7 q 9 q 40 q 39 q 38 800 800 r 25 q 29 q 26 q 30 q 31 q 36 r 4 11.13k r 20 3.3k r 23 3.3k r 22 1.12k r 14 30 q 12 q 15 q 17 r 10 1.8k r 7 1.8k 200 r 9 200 r 6 q 16 v+ r 12 1.1k q 14 q 11 r 13 30 c 1 10pf 10.6pf c 2 q 10 r 11 2k r 1 4k 200 r 5 200 r 8 + input r 3 960 q 5 r 19 6.3k bal output bal q 1 ha-2505
3 absolute maximum ratings thermal information supply voltage between v+ and v- terminals. . . . . . . . . . . . . . 40v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15v peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ma operating conditions temperature range ha-2505-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 o c to 75 o c thermal resistance (typical, note 1) ja ( o c/w) pdip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 maximum junction temperature (plastic package) . . . . . . . . 150 o c maximum storage temperature range . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. ja is measured with the component mounted on an evaluation pc board in free air. electrical speci?ations v s = 15v parameter temp ( o c) ha-2505-5 units min typ max input characteristics offset voltage 25 - 4 8 mv full - - 10 mv offset voltage average drift full - 20 - v/ o c bias current 25 - 125 250 na full - - 500 na offset current 25 - 20 50 na full - - 100 na input resistance (note 2) 25 20 50 - m ? common mode range full 10 - - v transfer characteristics large signal voltage gain (notes 3, 6) 25 15 25 - kv/v full 10 - - kv/v common mode rejection ratio (note 4) full 74 90 - db gain bandwidth product (note 5) 25 - 12 - mhz output characteristics output voltage swing (note 3) full 10 12 - v output current (note 6) 25 10 20 - ma full power bandwidth (notes 6, 11) 25 300 500 - khz transient response rise time (notes 3, 7, 8, 9) 25 - 25 50 ns overshoot (notes 3, 7, 8, 9) 25 - 25 50 % slew rate (notes 3, 7, 9, 12) 25 20 30 - v/ s settling time to 0.1% (notes 3, 7, 9, 12) 25 - 0.33 - s power supply characteristics supply current 25 - 4 6 ma psrr (note 10) full 74 90 - db notes: 2. this parameter value is based on design calculations. 3. r l = 2k ? . 4. v cm = 10v. 5. a v > 10. 6. v o = 10v. 7. c l = 50pf. 8. v o = 200mv. 9. see transient response test circuits and waveforms. 10. ? v = 5v. 11. full power bandwidth guaranteed based on slew rate measurement using: fpbw = slew rate/2 v peak . 12. v out = 5v. ha-2505
4 test circuits and waveforms figure 1. slew rate and settling time note: measured on both positive and negative transitions from 0v to +200mv and 0v to -200mv at the output. figure 2. transient response figure 3. slew rate and transient response r l = 2k ? , c l = 50pf vertical = 5v/div. upper trace: input horizontal = 200ns/div. lower trace: output t a = 25 o c, v s = 15v figure 4. voltage follower pulse response 13. a v = -1. 14. feedback and summing resistor ratios should be 0.1% matched. 15. clipping diodes cr 1 and cr 2 are optional. hp5082-2810 recommended. figure 5. settling time test circuit figure 6. suggested v os adjustment and compensation hook up 25% -5v -5v +5v input +5v 75% output error band 10mv from final value ? t slew = ? v/ ? t settling time ? v rate input 90% output 10% 0mv rise time +200mv 0mv +200mv overshoot + - out in 2k ? 50pf output input + 2k ? 5k ? 2 3 4 6 7 50pf v+ v- d g s 2n4416 cr 1 cr 2 settling time test point 1 f 0.01 f 1 f 0.01 f 2k ? 5k ? 2k ? - out in bal v- v+ 20k ? comp c c r t note: tested offset adjustment range is |v os + 1mv| minimum referred to output. typical ranges are 6mv with r t = 20k ?. ha-2505
5 typical performance curves v s = 15v, t a = 25 o c, unless otherwise speci?d figure 7. input bias and offset current vs temperature figure 8. equivalent input noise vs bandwidth (with 10hz high pass filter) figure 9. normalized ac parameters vs temperature figure 10. open loop frequency and phase response figure 11. normalized ac parameters vs supply voltage note: external compensation components are not required for stability, but may be added to reduce bandwidth if desired. figure 12. open loop frequency response for various values of capacitors from compensation pin to ground 100 80 60 40 20 0 -20 -40 -50 -25 0 25 50 75 100 125 current (na) temperature ( o c) bias current offset current frequency (hz) 100 10 1.0 0.1 100hz 1khz 10khz 100khz 1mhz equivalent input noise ( v rms ) thermal noise of 10k resistor 10k source resistance 0 source resistance 1.1 1.0 0.9 0.8 -50 -25 0 25 50 75 100 125 normalized parameters referred temperature ( o c) to values at 25 o c slew rate bandwidth frequency (hz) 120 0 100 10k 1m 10m 100m open loop voltage gain (db) 100 80 60 40 20 -20 10 100k 1k 180 30 60 90 120 150 phase gain phase (degrees) 0 1.1 1.0 0.9 0.8 10 15 20 normalized parameters referred supply voltage ( v) to values at 15v slew rate bandwidth frequency (hz) 120 0 100 10k 1m 10m 100m open loop voltage gain (db) 100 80 60 40 20 -20 10 100k 1k 100pf 0pf 30pf 1000pf 300pf ha-2505
6 figure 13. open loop voltage gain vs temperature figure 14. output voltage swing vs frequency figure 15. power supply current vs temperature typical performance curves v s = 15v, t a = 25 o c, unless otherwise speci?d (continued) 90 80 -50 -25 0 25 50 75 100 125 gain (db) temperature ( o c) v supply = 20v v supply = 15v v supply = 10v 0 10k 100k 1meg 10meg frequency (hz) 5 15 20 25 30 35 10 output voltage swing (v p-p ) v supply = 20v v supply = 15v v supply = 10v 4 3 supply current (ma) temperature ( o c) 5 v supply = 20v v supply = 15v v supply = 10v -50 -25 0 25 50 75 100 125 ha-2505
7 die characteristics die dimensions: 57 mils x 65 mils x 19 mils 1450 m x 1650 m x 483 m metallization: type: al, 1% cu thickness: 16k ? 2k ? passivation: type: nitride (si3n4) over silox (sio2, 5% phos.) silox thickness: 12k? 2k? nitride thickness: 3.5k? 1.5k? substrate potential (powered up): unbiased transistor count: 40 process: bipolar dielectric isolation metallization mask layout ha-2505 v+ out bal v- bal -in +in comp ha-2505
8 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil semiconductor products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or spec ifications at any time with- out notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is b elieved to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of th ird parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see web site www.intersil.com sales of?e headquarters north america intersil corporation p. o. box 883, mail stop 53-204 melbourne, fl 32902 tel: (321) 724-7000 fax: (321) 724-7240 europe intersil sa mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia intersil (taiwan) ltd. 7f-6, no. 101 fu hsing north road taipei, taiwan republic of china tel: (886) 2 2716 9310 fax: (886) 2 2715 3029 ha-2505 dual-in-line plastic packages (pdip) c l e e a c e b e c -b- e1 index 1 2 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a 1 -a- 0.010 (0.25) c a m bs notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions, the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the ?o series symbol list in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are measured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protru- sions. mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be per- pendicular to datum . 7. e b and e c are measured at the lead tips with the leads uncon- strained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- e8.3 (jedec ms-001-ba issue d) 8 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.210 - 5.33 4 a1 0.015 - 0.39 - 4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.15 1.77 8, 10 c 0.008 0.014 0.204 0.355 - d 0.355 0.400 9.01 10.16 5 d1 0.005 - 0.13 - 5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n8 89 rev. 0 12/93
|
